Montreal, Friday August 28, 2026. There are weeks when technology news is a parade of product launches, and there are weeks when the news is really about physics. This is one of the latter. Over the past seven days the industry has been arguing, in public and with unusual candour, about a single stubborn problem: moving data costs more than computing on it. That sentence sounds abstract. It is not. It explains why the laptop you are pricing today costs more than the identical model did eighteen months ago, why the phone in your pocket may ship with less memory next year than it did last year, and why one of the most interesting chips presented at a conference in Palo Alto this week is not a processor at all — it is a stick of RAM that learned to do arithmetic.

Below is our daily radar of the ten stories we judged most significant, followed by three deep dives into the ones with the most science to explain and the most direct bearing on what you should actually buy. As always, we only report figures we could trace to at least two independent sources, and we tell you plainly when a number is a manufacturer claim rather than an independent measurement.

Today's Tech Radar

1. Samsung's LPDDR5X-PIM: what happens when memory learns to do arithmetic

Processing-in-memory adds a small compute unit next to the DRAM banks themselves. Photo: William Warby / Unsplash.

The bottleneck nobody can design around

Almost every computer you have ever used follows the same basic floor plan: a processor over here, a pool of memory over there, and a bus between them. That arrangement, inherited from the earliest stored-program machines, has an inconvenient property. Processor speed has improved by orders of magnitude over the decades; the bandwidth of the link to main memory has improved far more slowly. Engineers call the resulting gap the memory wall, and for a long time it was a problem you could paper over with caches. If a program touches the same small working set repeatedly, a fast on-chip cache hides the latency of the slow trip to DRAM, and everyone is happy.

Large language model inference breaks that assumption in a very specific way. When a model generates text one token at a time, the dominant mathematical operation is not the dense matrix-by-matrix multiplication that GPUs love. It is a matrix-by-vector multiplication: a huge table of weights multiplied by a single, comparatively tiny activation vector. Every weight in that table has to be read from memory, used exactly once, and discarded. There is no reuse for a cache to exploit. The arithmetic itself is almost free; the reading is the entire cost. This is why the token generation phase of inference is described as memory-bandwidth bound, and why a device can have an impressive-sounding neural processing unit that still produces text slowly. The NPU spends most of its time waiting.

There are only three ways out. You can widen the road — more memory channels, faster signalling — which costs power and pins. You can shrink the cargo, using quantisation to store weights in four or eight bits instead of sixteen. Or you can stop making the trip. Processing-in-memory, usually shortened to PIM, is the third option.

How PIM actually works

To understand why compute inside a DRAM die is such a large win, you have to look at the internal geometry of a memory chip. DRAM is not a flat pool of bytes. It is divided into banks, each bank into rows and columns. When the memory controller requests data, an entire row — typically thousands of bits — is activated and copied into a row buffer, and then a narrow slice of that row is selected and pushed out through the chip's external pins. The internal bandwidth available at the bank level is therefore enormously larger than the external bandwidth that reaches the processor. The pins are the choke point, not the silicon.

PIM exploits exactly that asymmetry. Instead of shipping the row out to a distant processor, you place a small arithmetic unit — in practice a set of multiply-accumulate lanes with a modest register file — right beside the banks, inside the memory die. The weights never leave. Only the much smaller activation vector goes in, and only the much smaller result comes out. Because every bank can run its arithmetic unit simultaneously, the effective bandwidth available to the computation is the sum of all the internal bank bandwidths rather than the external interface bandwidth.

This is where Samsung's numbers at Hot Chips 2026, held at Stanford University on August 25, become intelligible. The company described a 16 GB LPDDR5X-PIM device delivering an internal PIM bandwidth of 614 GB/s against the 76.8 GB/s that the same conventional package provides through its external interface — roughly an eightfold increase. The headline application result was 3.01 times the AI token throughput of standard LPDDR5X. Crucially, Samsung presented the part in the same 561-ball package that device makers already design around, positioning it as a drop-in replacement rather than a new platform. Those figures come from Samsung's own presentation; they have been reported consistently by Tom's Hardware, ServeTheHome, DigiTimes and SamMobile, but they are vendor claims and have not yet been independently benchmarked in shipping consumer hardware.

Why this is aimed at phones and laptops, not data centres

The obvious question is why Samsung would bother, given that high-bandwidth memory already solves the bandwidth problem for AI accelerators. HBM stacks DRAM dies vertically and connects them with thousands of through-silicon vias, producing bandwidth figures that dwarf anything a mobile package can offer. The answer is economics and thermodynamics. HBM is expensive to manufacture, requires advanced packaging with an interposer, and dissipates power in a way that is entirely acceptable inside a server chassis with forced-air cooling and completely unacceptable inside a fanless tablet. HBM cannot reach down into the tier where phones, thin laptops and edge appliances live.

LPDDR5X-PIM is a bid for that tier. It takes an idea proven in the data centre and re-implements it in a low-power package that a phone or an AI PC can physically accommodate. The industry context is unflattering to the alternative: with HBM capacity absorbed almost entirely by AI accelerator demand, and with HBM costs mounting, a technique that raises effective bandwidth without moving to HBM is commercially attractive to everyone who is not building a data centre.

What this means when you buy a device today

Let us be clear about timelines, because this is where marketing enthusiasm usually outruns reality. LPDDR5X-PIM was presented as a blueprint at an engineering conference. It is not in a product you can buy this week, and PIM only helps if the software stack knows how to dispatch work to it — which means driver, runtime and framework support that does not yet exist broadly. Do not defer a purchase waiting for it.

What the announcement does tell you is where the constraint lies, and that information is immediately actionable. If you intend to run AI workloads locally — summarising documents, transcribing meetings, running a coding assistant offline — memory capacity and memory bandwidth will limit you long before the CPU does. A model's weights must fit in memory; if they do not, the system pages to SSD and performance collapses by an order of magnitude. This is why our standing advice for anyone doing serious local AI work is to buy the 32 GB configuration and treat it as the floor rather than the ceiling.

In practical terms, that points to machines like the Lenovo ThinkPad T14 Gen 5 with 32 GB and a 512 GB SSD, which is our deepest-stocked 32 GB business notebook at the moment, or the Microsoft Surface Laptop 7 13.8-inch Copilot+ PC with Core Ultra 7 and 32 GB if you want the NPU-equipped Copilot+ class in a smaller chassis. For engineering and content workloads where the model and the dataset compete for the same memory, the ThinkPad P16s Gen 4 with 32 GB and a 1 TB SSD gives you the storage headroom to keep several model checkpoints resident without constant housekeeping.

2. The memory supercycle: why your next laptop costs more, and why waiting will not help

Commodity DRAM has become the most expensive line item in a mid-range laptop. Photo: Liam Briese / Unsplash.

The numbers, and where they come from

The scale of the 2026 memory price movement is difficult to overstate, and it is worth stating carefully because the figures are large enough to sound like exaggeration. Global DRAM contract prices are estimated to have risen 90–95% quarter-over-quarter in the first quarter of 2026, followed by a projected 58–63% increase in the second. Gartner's February 2026 assessment put the combined DRAM and SSD price increase at roughly 130% by the end of the year, and translated that into device pricing: personal computers roughly 17% more expensive and smartphones roughly 13% more expensive than 2025 levels. The same analysis forecast worldwide PC shipments falling 10.4% and smartphone shipments falling 8.4% across 2026.

Manufacturers have said the quiet part out loud. Lenovo, Dell, HP, Acer and ASUS have all signalled PC price increases in the 15–20% range attributable to DRAM and NAND. TrendForce reporting relayed by TechPowerUp described smartphone and notebook brands raising prices and downgrading specifications — the latter being the more consequential development, since a price rise is visible on the sticker while a specification downgrade is not. The most-cited example is the entry-level phone segment, where base configurations that had settled at 6 or 8 GB may retreat toward 4 GB.

More recent reporting from Tom's Hardware suggests the surge is beginning to cool as consumers hit an affordability ceiling, though DRAM and NAND prices were still climbing through the third quarter of 2026 on continued AI demand. “Cooling” here means decelerating, not reversing.

Why DRAM is uniquely hard to scale out of a shortage

People often assume a chip shortage resolves the way a shortage of any manufactured good resolves: high prices attract capacity, capacity arrives, prices fall. That is eventually true of DRAM, but the lag is unusually long and the physics is unusually unforgiving, and it is worth understanding why.

A DRAM cell is one of the most elegantly minimal structures in electronics: a single transistor and a single capacitor, storing a bit as the presence or absence of charge. The elegance comes at a price. The capacitor leaks, so every cell must be read and rewritten thousands of times per second — the refresh cycle, which consumes power and steals bandwidth. And the capacitor must hold a minimum amount of charge to be reliably distinguishable from noise, regardless of how small you make the cell. As lithography advances shrink the cell footprint, manufacturers preserve capacitance by building the capacitor vertically, producing structures with aspect ratios that are extraordinarily difficult to etch uniformly across a wafer. Unlike logic, where a smaller transistor is straightforwardly better, DRAM scaling fights a physical constant. This is why DRAM density improves far more slowly than logic density, and why new capacity means new fabs rather than clever redesign.

New memory fabs take years and enormous capital. In the meantime, the same production lines and, critically, the same wafer starts can be allocated either to commodity DDR5 and LPDDR5X or to high-bandwidth memory for AI accelerators. HBM commands dramatically better margins. Every wafer diverted to HBM is a wafer not making the memory that goes into a laptop. Layer on top of that a Q2 2026 semiconductor market of $403.3 billion — up 35.1% quarter-over-quarter, with the full year widely expected to exceed $1.5 trillion — and the picture is clear: consumer devices are competing for capacity against the best-funded buyers in the history of the industry, and losing.

The buying advice this actually implies

Three practical conclusions follow, and they run against normal instincts.

First, do not wait for prices to fall. The forecast trajectory through the remainder of 2026 is flat-to-rising, and new fab capacity does not land on a timescale that helps a purchase you need to make this quarter. If a machine is in your budget and in stock now, the expected value of delay is negative.

Second, buy memory capacity you will not need for two years. This is the counterintuitive one. In a normal market, buying more RAM than you need is a mild waste, because you can upgrade later at a lower price. In this market, the later price is higher, and on most modern thin laptops the memory is soldered to the board and cannot be upgraded at all. The 16 GB versus 32 GB decision made at purchase is effectively permanent. Given that operating systems, browsers and on-device AI features are all trending toward larger resident footprints, 16 GB is a reasonable floor for general office work and 32 GB is the sensible choice for anything involving virtualisation, large datasets, video, or local AI models.

Third, be alert to quiet specification downgrades. When component costs spike, manufacturers hold the sticker price and reduce what is behind it: less RAM, a slower or smaller SSD, a lower-binned panel. Read the full model number, not the marketing name. Two laptops sold as the same family can differ by a factor of two in memory.

Against that backdrop, here is how our current in-stock inventory maps to real needs. For general business deployment where you want current-generation silicon at sensible cost, the ThinkPad E16 Gen 3 with Core Ultra 5 and 16 GB is deeply stocked and represents the pragmatic floor. If you want the Copilot+ NPU class with a 16-inch panel, the ThinkPad T16 Gen 4 with Ryzen AI 7 PRO 350, 16 GB and a 512 GB SSD pairs a larger workspace with a modern NPU. For an Arm-based Copilot+ machine with unusually good battery behaviour, the IdeaPad Slim 3 with Snapdragon X, 16 GB and 512 GB is the one to look at. And if your fleet decision is really about tablets, the Galaxy Tab S11 with 12 GB of RAM is currently the most memory-generous tablet we stock, while the Galaxy Tab A11+ with 6 GB and 128 GB is the volume choice for deployments where you need many units rather than maximum capability. If you would like help sizing memory across a fleet before prices move again, you can request a free quote from our team and we will work through the configurations with you.

3. Micro RGB, QD-OLED and the brightness race: how displays stopped filtering light away

Backlight architecture, not panel size, is where the 2026 display generation actually changed. Photo: JALG TV Stand / Unsplash.

The wasteful thing every LCD has always done

To appreciate why Micro RGB is interesting, you need to know how catastrophically inefficient a conventional LCD is at producing colour. A standard LED-backlit television starts with a sheet of white light. That white light is usually not white at all in origin: it is a blue LED with a phosphor or quantum-dot layer that converts some of the blue into longer wavelengths, producing something the eye reads as white. That broad-spectrum light passes through a liquid crystal layer that acts as a shutter, controlling how much light gets through each subpixel. Then — and this is the wasteful part — it passes through a colour filter: a red, green or blue dye that absorbs everything it is not. To make a red subpixel, you generate white light and then throw away roughly two-thirds of it.

That subtractive process costs more than efficiency. Colour filters are imperfect. A red filter passes some green, a green filter passes some blue, and the result is crosstalk that limits how saturated a colour can be. It also explains why LCDs have historically struggled with deep blacks: the backlight is always on somewhere, and liquid crystal shutters leak. Mini-LED backlights improved this by dividing the backlight into thousands of independently dimmable zones, but the zones are still zones of white light, and the filter loss remains.

What Micro RGB changes

Micro RGB replaces the white backlight with an array of individual red, green and blue LEDs, each below 100 micrometres in size, each independently driven. Because the backlight already emits the correct colour at each location, the colour filter layer can be minimised or eliminated. Local dimming is no longer purely a brightness operation — it becomes a chromatic one, since the backlight behind a red region of the image can itself be predominantly red.

The measurable consequences are meaningful. Samsung reports its Micro RGB panels exceeding 100% of the BT.2020 colour volume — around 106%, with the gains concentrated in red and blue — where a conventional quantum-dot LCD sits far lower. For scale, BT.2020 is the ultra-wide colour space defined for ultra-high-definition broadcast; essentially no consumer display has fully covered it until now. Samsung quotes peak brightness of about 2,800 nits on a 10% HDR window for its 2026 Micro RGB models, and the company expanded the line-up this year to 55, 65, 75, 85, 100 and 115 inches. Competing Micro RGB implementations have been measured higher still — the Hisense UR9 series has been reported above 5,500 nits in a 10% window — which tells you the category, not just one product, is where the brightness race is being run.

Meanwhile the self-emissive side has not stood still. Samsung Display showed a 2026 QD-OLED television panel claiming 4,500 nits peak brightness, using reformulated organic emitter materials, alongside a 1.4-inch RGB micro-OLED at roughly 5,000 pixels per inch for headsets — against approximately 3,400 ppi in Apple Vision Pro. Further out, Samsung Display has demonstrated EL-QD prototypes, sometimes called NanoLED, in which quantum dots are driven electrically and emit light directly rather than being pumped by a separate blue source. The prototypes shown at Display Week 2026 were an 18-inch panel at 500 nits and a 6.5-inch panel at 400 nits — modest numbers that mark a technology at the demonstration stage, not a product you will see this year.

How to read a display specification without being misled

A few interpretive rules will save you money. Peak brightness figures are almost always quoted on a small window — typically 10% of the screen area — because sustaining that luminance across the full panel would exceed thermal and power limits. A television advertising 4,500 nits will not display a 4,500-nit white field. Ask for the full-screen sustained figure if the content you care about is bright and uniform, such as sports, presentations or retail signage.

Colour gamut coverage and colour volume are different claims. Coverage says which colours a display can produce; volume says whether it can produce them at usefully high brightness. A panel can cover a wide gamut only at low luminance and still advertise the coverage number.

And ambient light usually matters more than either. In a bright room, anti-glare treatment and sustained full-screen brightness determine legibility far more than peak highlights or contrast ratio. This is exactly why commercial signage panels are specified differently from consumer televisions: they publish sustained nit ratings and are rated for daily operating hours, because they have to work in a lit environment all day.

That distinction drives our recommendations. For a bright retail floor, lobby or boardroom where the screen runs continuously, a commercial panel is the correct purchase rather than a consumer television. The Samsung QMC Series 55-inch UHD at 500 nits with a non-glare finish, IP5X rating and 24/7 duty cycle is our deepest-stocked panel in that class and is the one we most often specify for lit spaces. For a large-format installation, the Samsung QM85C 85-inch UHD, also 500 nits non-glare and rated 24/7, covers auditoriums and large meeting rooms. Where the display runs during business hours rather than around the clock and budget matters more than peak luminance, the Samsung 55-inch Crystal UHD Signage QBC is the sensible step down. On the desktop, if colour work is the point, the ViewSonic 32-inch 4K UHD professional graphic design monitor with 90 W USB-C handles power, video and data over a single cable, while the ViewSonic VA2756-4K-MHD 27-inch 4K is the value option for general productivity.

4. Security sidebar: the 24-hour patch window

What the August advisories actually said

On August 18, 2026, CISA, the FBI and the U.S. Department of Health and Human Services updated their joint #StopRansomware advisory on Medusa. The headline figure is that Medusa developers and affiliates had affected more than 500 victims across critical infrastructure sectors as of April 2026, up from an estimated 300-plus in the March 2025 version of the advisory. Affected sectors include medical, education, legal, insurance, technology and manufacturing. Medusa operates as ransomware-as-a-service, meaning the developers build and maintain the malware while affiliates carry out intrusions and share proceeds.

One operational detail in the advisory deserves more attention than it usually gets: affiliates weaponise newly announced exploits within 24 hours, and investigators have observed the group using exploits as much as a week before the underlying vulnerability was publicly disclosed. Separately, by August 19 the Cl0p group had listed more than 40 organisations on its leak site as victims of a campaign against PTC's Windchill and FlexPLM product lifecycle management platforms — systems that hold engineering drawings, bills of materials and supplier data.

The engineering lesson

These two campaigns point at the same structural weakness. The window between a vulnerability becoming known and being exploited at scale has collapsed to roughly a day, and sometimes it is negative. A monthly patch cycle, which was defensible practice a decade ago, now leaves a device exposed for an average of two weeks against adversaries who move in hours.

The countermeasures are unglamorous and effective. Enable automatic operating system and firmware updates on endpoints, and verify that they are actually applying rather than silently failing. Enforce phishing-resistant multi-factor authentication, because credential theft remains the dominant initial access vector and MFA breaks the attack chain even when a password is compromised. Segment your network so that a compromised workstation cannot reach a file server or a PLM system directly. Keep offline, tested backups — untested backups are a hypothesis, not a recovery plan. And pay particular attention to the specialised business platforms that sit outside your normal patching inventory; the Cl0p campaign succeeded precisely because engineering software is rarely in the same maintenance regime as laptops.

Hardware plays a supporting role here that is easy to overlook. Business-class notebooks ship with a discrete security processor, firmware-level protections and management tooling that let an administrator verify patch state, enforce disk encryption and remotely attest device health across a fleet. Machines like the ThinkPad T16 Gen 4 with Ryzen AI 5 PRO carry the PRO-series manageability features that make fleet-wide patch enforcement practical rather than aspirational. If you are unsure whether your current endpoint estate can be patched and attested centrally, that is exactly the kind of question we are happy to work through with you — request a free quote from our team and we will review your configuration.

Putting the three threads together

Read individually, this week's stories look unrelated: a memory research presentation, a pricing forecast, a television line-up, a ransomware advisory. Read together, they describe a single industry-wide adjustment.

The AI build-out has absorbed the semiconductor industry's marginal capacity. That is why commodity DRAM is expensive and why Samsung is investing engineering effort in extracting more effective bandwidth from low-power memory rather than waiting for HBM to become affordable. It is why device makers are downgrading specifications quietly instead of raising prices openly. And it is indirectly why the security picture is deteriorating: organisations under cost pressure defer refreshes, and older endpoints are harder to patch, harder to attest and more likely to be running an operating system version that no longer receives timely updates.

The displays story is the pleasant counterpoint. Panel technology is one of the few areas where 2026 is delivering unambiguous improvement at flat or falling prices, because display fabs are not competing with AI accelerators for capacity. If your budget is constrained, a display upgrade delivers more perceptible daily benefit per dollar this year than almost any other component.

Our overall guidance for the rest of 2026, then: buy compute conservatively but buy memory generously, because memory is the constraint you cannot fix later. Prioritise patchable, manageable endpoints over raw specifications. And do not defer a purchase you need on the assumption that the market will improve — on current forecasts, it will not improve this year.

Glossary of the Week

Setup at a Glance

Sources & Further Reading

Samsung LPDDR5X-PIM at Hot Chips 2026: Tom's Hardware, ServeTheHome, DigiTimes, SamMobile. Memory pricing and shipment forecasts: Gartner, TechPowerUp / TrendForce, Tom's Hardware, IDC. Semiconductor market data: Semiconductor Industry Association. Display technology: Samsung Newsroom, Engadget, FlatpanelsHD on QD-OLED, FlatpanelsHD on EL-QD prototypes, Tech Guide. Security advisories: CISA #StopRansomware: Medusa, BleepingComputer, Help Net Security, SWK Technologies on the Cl0p/PTC campaign. Photos: Unsplash (free commercial licence).

Every figure in this article is attributed to its source, and where a number is a manufacturer claim rather than an independent measurement we have said so explicitly. Stock levels quoted reflect our inventory on the morning of August 28, 2026 and change through the day. If you would like a configuration sized to your actual workload — memory capacity for local AI, sustained brightness for a lit room, or a patchable endpoint fleet you can attest centrally — request a free quote from our team and we will put together a specification with you. See you tomorrow.